startup_stm32f0xx.s 10 KB

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  1. ;******************** (C) COPYRIGHT 2013 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f0xx.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V1.2.0
  5. ;* Date : 31-July-2013
  6. ;* Description : STM32F0xx Medium-density devices vector table for MDK-ARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == Reset_Handler
  10. ;* - Set the vector table entries with the exceptions ISR address
  11. ;* - Configure the system clock
  12. ;* - Branches to __main in the C library (which eventually
  13. ;* calls main()).
  14. ;* After Reset the CortexM0 processor is in Thread mode,
  15. ;* priority is Privileged, and the Stack is set to Main.
  16. ;* <<< Use Configuration Wizard in Context Menu >>>
  17. ;*******************************************************************************
  18. ; @attention
  19. ;
  20. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  21. ; You may not use this file except in compliance with the License.
  22. ; You may obtain a copy of the License at:
  23. ;
  24. ; http://www.st.com/software_license_agreement_liberty_v2
  25. ;
  26. ; Unless required by applicable law or agreed to in writing, software
  27. ; distributed under the License is distributed on an "AS IS" BASIS,
  28. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  29. ; See the License for the specific language governing permissions and
  30. ; limitations under the License.
  31. ;
  32. ;*******************************************************************************
  33. ;
  34. ; Amount of memory (in bytes) allocated for Stack
  35. ; Tailor this value to your application needs
  36. ; <h> Stack Configuration
  37. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  38. ; </h>
  39. Stack_Size EQU 0x00000400
  40. AREA STACK, NOINIT, READWRITE, ALIGN=3
  41. Stack_Mem SPACE Stack_Size
  42. __initial_sp
  43. ; <h> Heap Configuration
  44. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  45. ; </h>
  46. Heap_Size EQU 0x00000200
  47. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  48. __heap_base
  49. Heap_Mem SPACE Heap_Size
  50. __heap_limit
  51. PRESERVE8
  52. THUMB
  53. ; Vector Table Mapped to Address 0 at Reset
  54. AREA RESET, DATA, READONLY
  55. EXPORT __Vectors
  56. EXPORT __Vectors_End
  57. EXPORT __Vectors_Size
  58. __Vectors DCD __initial_sp ; Top of Stack
  59. DCD Reset_Handler ; Reset Handler
  60. DCD NMI_Handler ; NMI Handler
  61. DCD HardFault_Handler ; Hard Fault Handler
  62. DCD 0 ; Reserved
  63. DCD 0 ; Reserved
  64. DCD 0 ; Reserved
  65. DCD 0 ; Reserved
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD SVC_Handler ; SVCall Handler
  70. DCD 0 ; Reserved
  71. DCD 0 ; Reserved
  72. DCD PendSV_Handler ; PendSV Handler
  73. DCD SysTick_Handler ; SysTick Handler
  74. ; External Interrupts
  75. DCD WWDG_IRQHandler ; Window Watchdog
  76. DCD PVD_IRQHandler ; PVD through EXTI Line detect
  77. DCD RTC_IRQHandler ; RTC through EXTI Line
  78. DCD FLASH_IRQHandler ; FLASH
  79. DCD RCC_IRQHandler ; RCC
  80. DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
  81. DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
  82. DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
  83. DCD TS_IRQHandler ; TS
  84. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  85. DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
  86. DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
  87. DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
  88. DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
  89. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  90. DCD TIM2_IRQHandler ; TIM2
  91. DCD TIM3_IRQHandler ; TIM3
  92. DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
  93. DCD 0 ; Reserved
  94. DCD TIM14_IRQHandler ; TIM14
  95. DCD TIM15_IRQHandler ; TIM15
  96. DCD TIM16_IRQHandler ; TIM16
  97. DCD TIM17_IRQHandler ; TIM17
  98. DCD I2C1_IRQHandler ; I2C1
  99. DCD I2C2_IRQHandler ; I2C2
  100. DCD SPI1_IRQHandler ; SPI1
  101. DCD SPI2_IRQHandler ; SPI2
  102. DCD USART1_IRQHandler ; USART1
  103. DCD USART2_IRQHandler ; USART2
  104. DCD 0 ; Reserved
  105. DCD CEC_IRQHandler ; CEC
  106. DCD 0 ; Reserved
  107. __Vectors_End
  108. __Vectors_Size EQU __Vectors_End - __Vectors
  109. AREA |.text|, CODE, READONLY
  110. ; Reset handler routine
  111. Reset_Handler PROC
  112. EXPORT Reset_Handler [WEAK]
  113. IMPORT __main
  114. IMPORT SystemInit
  115. LDR R0, =SystemInit
  116. BLX R0
  117. LDR R0, =__main
  118. BX R0
  119. ENDP
  120. ; Dummy Exception Handlers (infinite loops which can be modified)
  121. NMI_Handler PROC
  122. EXPORT NMI_Handler [WEAK]
  123. B .
  124. ENDP
  125. HardFault_Handler\
  126. PROC
  127. EXPORT HardFault_Handler [WEAK]
  128. B .
  129. ENDP
  130. SVC_Handler PROC
  131. EXPORT SVC_Handler [WEAK]
  132. B .
  133. ENDP
  134. PendSV_Handler PROC
  135. EXPORT PendSV_Handler [WEAK]
  136. B .
  137. ENDP
  138. SysTick_Handler PROC
  139. EXPORT SysTick_Handler [WEAK]
  140. B .
  141. ENDP
  142. Default_Handler PROC
  143. EXPORT WWDG_IRQHandler [WEAK]
  144. EXPORT PVD_IRQHandler [WEAK]
  145. EXPORT RTC_IRQHandler [WEAK]
  146. EXPORT FLASH_IRQHandler [WEAK]
  147. EXPORT RCC_IRQHandler [WEAK]
  148. EXPORT EXTI0_1_IRQHandler [WEAK]
  149. EXPORT EXTI2_3_IRQHandler [WEAK]
  150. EXPORT EXTI4_15_IRQHandler [WEAK]
  151. EXPORT TS_IRQHandler [WEAK]
  152. EXPORT DMA1_Channel1_IRQHandler [WEAK]
  153. EXPORT DMA1_Channel2_3_IRQHandler [WEAK]
  154. EXPORT DMA1_Channel4_5_IRQHandler [WEAK]
  155. EXPORT ADC1_COMP_IRQHandler [WEAK]
  156. EXPORT TIM1_BRK_UP_TRG_COM_IRQHandler [WEAK]
  157. EXPORT TIM1_CC_IRQHandler [WEAK]
  158. EXPORT TIM2_IRQHandler [WEAK]
  159. EXPORT TIM3_IRQHandler [WEAK]
  160. EXPORT TIM6_DAC_IRQHandler [WEAK]
  161. EXPORT TIM14_IRQHandler [WEAK]
  162. EXPORT TIM15_IRQHandler [WEAK]
  163. EXPORT TIM16_IRQHandler [WEAK]
  164. EXPORT TIM17_IRQHandler [WEAK]
  165. EXPORT I2C1_IRQHandler [WEAK]
  166. EXPORT I2C2_IRQHandler [WEAK]
  167. EXPORT SPI1_IRQHandler [WEAK]
  168. EXPORT SPI2_IRQHandler [WEAK]
  169. EXPORT USART1_IRQHandler [WEAK]
  170. EXPORT USART2_IRQHandler [WEAK]
  171. EXPORT CEC_IRQHandler [WEAK]
  172. WWDG_IRQHandler
  173. PVD_IRQHandler
  174. RTC_IRQHandler
  175. FLASH_IRQHandler
  176. RCC_IRQHandler
  177. EXTI0_1_IRQHandler
  178. EXTI2_3_IRQHandler
  179. EXTI4_15_IRQHandler
  180. TS_IRQHandler
  181. DMA1_Channel1_IRQHandler
  182. DMA1_Channel2_3_IRQHandler
  183. DMA1_Channel4_5_IRQHandler
  184. ADC1_COMP_IRQHandler
  185. TIM1_BRK_UP_TRG_COM_IRQHandler
  186. TIM1_CC_IRQHandler
  187. TIM2_IRQHandler
  188. TIM3_IRQHandler
  189. TIM6_DAC_IRQHandler
  190. TIM14_IRQHandler
  191. TIM15_IRQHandler
  192. TIM16_IRQHandler
  193. TIM17_IRQHandler
  194. I2C1_IRQHandler
  195. I2C2_IRQHandler
  196. SPI1_IRQHandler
  197. SPI2_IRQHandler
  198. USART1_IRQHandler
  199. USART2_IRQHandler
  200. CEC_IRQHandler
  201. B .
  202. ENDP
  203. ALIGN
  204. ;*******************************************************************************
  205. ; User Stack and Heap initialization
  206. ;*******************************************************************************
  207. IF :DEF:__MICROLIB
  208. EXPORT __initial_sp
  209. EXPORT __heap_base
  210. EXPORT __heap_limit
  211. ELSE
  212. IMPORT __use_two_region_memory
  213. EXPORT __user_initial_stackheap
  214. __user_initial_stackheap
  215. LDR R0, = Heap_Mem
  216. LDR R1, =(Stack_Mem + Stack_Size)
  217. LDR R2, = (Heap_Mem + Heap_Size)
  218. LDR R3, = Stack_Mem
  219. BX LR
  220. ALIGN
  221. ENDIF
  222. END
  223. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****