arm_dot_prod_q15.c 3.7 KB

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  1. /* ----------------------------------------------------------------------
  2. * Project: CMSIS DSP Library
  3. * Title: arm_dot_prod_q15.c
  4. * Description: Q15 dot product
  5. *
  6. * $Date: 27. January 2017
  7. * $Revision: V.1.5.1
  8. *
  9. * Target Processor: Cortex-M cores
  10. * -------------------------------------------------------------------- */
  11. /*
  12. * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
  13. *
  14. * SPDX-License-Identifier: Apache-2.0
  15. *
  16. * Licensed under the Apache License, Version 2.0 (the License); you may
  17. * not use this file except in compliance with the License.
  18. * You may obtain a copy of the License at
  19. *
  20. * www.apache.org/licenses/LICENSE-2.0
  21. *
  22. * Unless required by applicable law or agreed to in writing, software
  23. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25. * See the License for the specific language governing permissions and
  26. * limitations under the License.
  27. */
  28. #include "arm_math.h"
  29. /**
  30. * @ingroup groupMath
  31. */
  32. /**
  33. * @addtogroup dot_prod
  34. * @{
  35. */
  36. /**
  37. * @brief Dot product of Q15 vectors.
  38. * @param[in] *pSrcA points to the first input vector
  39. * @param[in] *pSrcB points to the second input vector
  40. * @param[in] blockSize number of samples in each vector
  41. * @param[out] *result output result returned here
  42. * @return none.
  43. *
  44. * <b>Scaling and Overflow Behavior:</b>
  45. * \par
  46. * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
  47. * results are added to a 64-bit accumulator in 34.30 format.
  48. * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
  49. * there is no risk of overflow.
  50. * The return result is in 34.30 format.
  51. */
  52. void arm_dot_prod_q15(
  53. q15_t * pSrcA,
  54. q15_t * pSrcB,
  55. uint32_t blockSize,
  56. q63_t * result)
  57. {
  58. q63_t sum = 0; /* Temporary result storage */
  59. uint32_t blkCnt; /* loop counter */
  60. #if defined (ARM_MATH_DSP)
  61. /* Run the below code for Cortex-M4 and Cortex-M3 */
  62. /*loop Unrolling */
  63. blkCnt = blockSize >> 2U;
  64. /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
  65. ** a second loop below computes the remaining 1 to 3 samples. */
  66. while (blkCnt > 0U)
  67. {
  68. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  69. /* Calculate dot product and then store the result in a temporary buffer. */
  70. sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  71. sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
  72. /* Decrement the loop counter */
  73. blkCnt--;
  74. }
  75. /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
  76. ** No loop unrolling is used. */
  77. blkCnt = blockSize % 0x4U;
  78. while (blkCnt > 0U)
  79. {
  80. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  81. /* Calculate dot product and then store the results in a temporary buffer. */
  82. sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
  83. /* Decrement the loop counter */
  84. blkCnt--;
  85. }
  86. #else
  87. /* Run the below code for Cortex-M0 */
  88. /* Initialize blkCnt with number of samples */
  89. blkCnt = blockSize;
  90. while (blkCnt > 0U)
  91. {
  92. /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
  93. /* Calculate dot product and then store the results in a temporary buffer. */
  94. sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
  95. /* Decrement the loop counter */
  96. blkCnt--;
  97. }
  98. #endif /* #if defined (ARM_MATH_DSP) */
  99. /* Store the result in the destination buffer in 34.30 format */
  100. *result = sum;
  101. }
  102. /**
  103. * @} end of dot_prod group
  104. */