stm32f1xx_hal_tim_ex.c 77 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_hal_tim_ex.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Timer Extended peripheral:
  8. * + Time Hall Sensor Interface Initialization
  9. * + Time Hall Sensor Interface Start
  10. * + Time Complementary signal break and dead time configuration
  11. * + Time Master and Slave synchronization configuration
  12. * + Timer remapping capabilities configuration
  13. @verbatim
  14. ==============================================================================
  15. ##### TIMER Extended features #####
  16. ==============================================================================
  17. [..]
  18. The Timer Extended features include:
  19. (#) Complementary outputs with programmable dead-time for :
  20. (++) Output Compare
  21. (++) PWM generation (Edge and Center-aligned Mode)
  22. (++) One-pulse mode output
  23. (#) Synchronization circuit to control the timer with external signals and to
  24. interconnect several timers together.
  25. (#) Break input to put the timer output signals in reset state or in a known state.
  26. (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  27. positioning purposes
  28. ##### How to use this driver #####
  29. ==============================================================================
  30. [..]
  31. (#) Initialize the TIM low level resources by implementing the following functions
  32. depending on the selected feature:
  33. (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  34. (#) Initialize the TIM low level resources :
  35. (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  36. (##) TIM pins configuration
  37. (+++) Enable the clock for the TIM GPIOs using the following function:
  38. __HAL_RCC_GPIOx_CLK_ENABLE();
  39. (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  40. (#) The external Clock can be configured, if needed (the default clock is the
  41. internal clock from the APBx), using the following function:
  42. HAL_TIM_ConfigClockSource, the clock configuration should be done before
  43. any start function.
  44. (#) Configure the TIM in the desired functioning mode using one of the
  45. initialization function of this driver:
  46. (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  47. Timer Hall Sensor Interface and the commutation event with the corresponding
  48. Interrupt and DMA request if needed (Note that One Timer is used to interface
  49. with the Hall sensor Interface and another Timer should be used to use
  50. the commutation event).
  51. (#) Activate the TIM peripheral using one of the start functions:
  52. (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(),
  53. HAL_TIMEx_OCN_Start_IT()
  54. (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(),
  55. HAL_TIMEx_PWMN_Start_IT()
  56. (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  57. (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(),
  58. HAL_TIMEx_HallSensor_Start_IT().
  59. @endverbatim
  60. ******************************************************************************
  61. * @attention
  62. *
  63. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  64. * All rights reserved.</center></h2>
  65. *
  66. * This software component is licensed by ST under BSD 3-Clause license,
  67. * the "License"; You may not use this file except in compliance with the
  68. * License. You may obtain a copy of the License at:
  69. * opensource.org/licenses/BSD-3-Clause
  70. *
  71. ******************************************************************************
  72. */
  73. /* Includes ------------------------------------------------------------------*/
  74. #include "stm32f1xx_hal.h"
  75. /** @addtogroup STM32F1xx_HAL_Driver
  76. * @{
  77. */
  78. /** @defgroup TIMEx TIMEx
  79. * @brief TIM Extended HAL module driver
  80. * @{
  81. */
  82. #ifdef HAL_TIM_MODULE_ENABLED
  83. /* Private typedef -----------------------------------------------------------*/
  84. /* Private define ------------------------------------------------------------*/
  85. /* Private macros ------------------------------------------------------------*/
  86. /* Private variables ---------------------------------------------------------*/
  87. /* Private function prototypes -----------------------------------------------*/
  88. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
  89. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
  90. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  91. /* Exported functions --------------------------------------------------------*/
  92. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  93. * @{
  94. */
  95. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  96. * @brief Timer Hall Sensor functions
  97. *
  98. @verbatim
  99. ==============================================================================
  100. ##### Timer Hall Sensor functions #####
  101. ==============================================================================
  102. [..]
  103. This section provides functions allowing to:
  104. (+) Initialize and configure TIM HAL Sensor.
  105. (+) De-initialize TIM HAL Sensor.
  106. (+) Start the Hall Sensor Interface.
  107. (+) Stop the Hall Sensor Interface.
  108. (+) Start the Hall Sensor Interface and enable interrupts.
  109. (+) Stop the Hall Sensor Interface and disable interrupts.
  110. (+) Start the Hall Sensor Interface and enable DMA transfers.
  111. (+) Stop the Hall Sensor Interface and disable DMA transfers.
  112. @endverbatim
  113. * @{
  114. */
  115. /**
  116. * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  117. * @note When the timer instance is initialized in Hall Sensor Interface mode,
  118. * timer channels 1 and channel 2 are reserved and cannot be used for
  119. * other purpose.
  120. * @param htim TIM Hall Sensor Interface handle
  121. * @param sConfig TIM Hall Sensor configuration structure
  122. * @retval HAL status
  123. */
  124. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
  125. {
  126. TIM_OC_InitTypeDef OC_Config;
  127. /* Check the TIM handle allocation */
  128. if (htim == NULL)
  129. {
  130. return HAL_ERROR;
  131. }
  132. /* Check the parameters */
  133. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  134. assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  135. assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  136. assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  137. assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  138. assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  139. assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  140. if (htim->State == HAL_TIM_STATE_RESET)
  141. {
  142. /* Allocate lock resource and initialize it */
  143. htim->Lock = HAL_UNLOCKED;
  144. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  145. /* Reset interrupt callbacks to legacy week callbacks */
  146. TIM_ResetCallback(htim);
  147. if (htim->HallSensor_MspInitCallback == NULL)
  148. {
  149. htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  150. }
  151. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  152. htim->HallSensor_MspInitCallback(htim);
  153. #else
  154. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  155. HAL_TIMEx_HallSensor_MspInit(htim);
  156. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  157. }
  158. /* Set the TIM state */
  159. htim->State = HAL_TIM_STATE_BUSY;
  160. /* Configure the Time base in the Encoder Mode */
  161. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  162. /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
  163. TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  164. /* Reset the IC1PSC Bits */
  165. htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  166. /* Set the IC1PSC value */
  167. htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  168. /* Enable the Hall sensor interface (XOR function of the three inputs) */
  169. htim->Instance->CR2 |= TIM_CR2_TI1S;
  170. /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  171. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  172. htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  173. /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  174. htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  175. htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  176. /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  177. OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  178. OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  179. OC_Config.OCMode = TIM_OCMODE_PWM2;
  180. OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  181. OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  182. OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  183. OC_Config.Pulse = sConfig->Commutation_Delay;
  184. TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  185. /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  186. register to 101 */
  187. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  188. htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  189. /* Initialize the DMA burst operation state */
  190. htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
  191. /* Initialize the TIM channels state */
  192. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  193. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  194. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  195. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  196. /* Initialize the TIM state*/
  197. htim->State = HAL_TIM_STATE_READY;
  198. return HAL_OK;
  199. }
  200. /**
  201. * @brief DeInitializes the TIM Hall Sensor interface
  202. * @param htim TIM Hall Sensor Interface handle
  203. * @retval HAL status
  204. */
  205. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  206. {
  207. /* Check the parameters */
  208. assert_param(IS_TIM_INSTANCE(htim->Instance));
  209. htim->State = HAL_TIM_STATE_BUSY;
  210. /* Disable the TIM Peripheral Clock */
  211. __HAL_TIM_DISABLE(htim);
  212. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  213. if (htim->HallSensor_MspDeInitCallback == NULL)
  214. {
  215. htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  216. }
  217. /* DeInit the low level hardware */
  218. htim->HallSensor_MspDeInitCallback(htim);
  219. #else
  220. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  221. HAL_TIMEx_HallSensor_MspDeInit(htim);
  222. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  223. /* Change the DMA burst operation state */
  224. htim->DMABurstState = HAL_DMA_BURST_STATE_RESET;
  225. /* Change the TIM channels state */
  226. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  227. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  228. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET);
  229. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET);
  230. /* Change TIM state */
  231. htim->State = HAL_TIM_STATE_RESET;
  232. /* Release Lock */
  233. __HAL_UNLOCK(htim);
  234. return HAL_OK;
  235. }
  236. /**
  237. * @brief Initializes the TIM Hall Sensor MSP.
  238. * @param htim TIM Hall Sensor Interface handle
  239. * @retval None
  240. */
  241. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  242. {
  243. /* Prevent unused argument(s) compilation warning */
  244. UNUSED(htim);
  245. /* NOTE : This function should not be modified, when the callback is needed,
  246. the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  247. */
  248. }
  249. /**
  250. * @brief DeInitializes TIM Hall Sensor MSP.
  251. * @param htim TIM Hall Sensor Interface handle
  252. * @retval None
  253. */
  254. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  255. {
  256. /* Prevent unused argument(s) compilation warning */
  257. UNUSED(htim);
  258. /* NOTE : This function should not be modified, when the callback is needed,
  259. the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  260. */
  261. }
  262. /**
  263. * @brief Starts the TIM Hall Sensor Interface.
  264. * @param htim TIM Hall Sensor Interface handle
  265. * @retval HAL status
  266. */
  267. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  268. {
  269. uint32_t tmpsmcr;
  270. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  271. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  272. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  273. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  274. /* Check the parameters */
  275. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  276. /* Check the TIM channels state */
  277. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  278. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  279. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  280. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  281. {
  282. return HAL_ERROR;
  283. }
  284. /* Set the TIM channels state */
  285. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  286. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  287. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  288. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  289. /* Enable the Input Capture channel 1
  290. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  291. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  292. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  293. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  294. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  295. {
  296. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  297. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  298. {
  299. __HAL_TIM_ENABLE(htim);
  300. }
  301. }
  302. else
  303. {
  304. __HAL_TIM_ENABLE(htim);
  305. }
  306. /* Return function status */
  307. return HAL_OK;
  308. }
  309. /**
  310. * @brief Stops the TIM Hall sensor Interface.
  311. * @param htim TIM Hall Sensor Interface handle
  312. * @retval HAL status
  313. */
  314. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  315. {
  316. /* Check the parameters */
  317. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  318. /* Disable the Input Capture channels 1, 2 and 3
  319. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  320. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  321. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  322. /* Disable the Peripheral */
  323. __HAL_TIM_DISABLE(htim);
  324. /* Set the TIM channels state */
  325. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  326. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  327. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  328. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  329. /* Return function status */
  330. return HAL_OK;
  331. }
  332. /**
  333. * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
  334. * @param htim TIM Hall Sensor Interface handle
  335. * @retval HAL status
  336. */
  337. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  338. {
  339. uint32_t tmpsmcr;
  340. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  341. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  342. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  343. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  344. /* Check the parameters */
  345. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  346. /* Check the TIM channels state */
  347. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  348. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  349. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  350. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  351. {
  352. return HAL_ERROR;
  353. }
  354. /* Set the TIM channels state */
  355. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  356. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  357. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  358. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  359. /* Enable the capture compare Interrupts 1 event */
  360. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  361. /* Enable the Input Capture channel 1
  362. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  363. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  364. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  365. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  366. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  367. {
  368. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  369. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  370. {
  371. __HAL_TIM_ENABLE(htim);
  372. }
  373. }
  374. else
  375. {
  376. __HAL_TIM_ENABLE(htim);
  377. }
  378. /* Return function status */
  379. return HAL_OK;
  380. }
  381. /**
  382. * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
  383. * @param htim TIM Hall Sensor Interface handle
  384. * @retval HAL status
  385. */
  386. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  387. {
  388. /* Check the parameters */
  389. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  390. /* Disable the Input Capture channel 1
  391. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  392. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  393. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  394. /* Disable the capture compare Interrupts event */
  395. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  396. /* Disable the Peripheral */
  397. __HAL_TIM_DISABLE(htim);
  398. /* Set the TIM channels state */
  399. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  400. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  401. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  402. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  403. /* Return function status */
  404. return HAL_OK;
  405. }
  406. /**
  407. * @brief Starts the TIM Hall Sensor Interface in DMA mode.
  408. * @param htim TIM Hall Sensor Interface handle
  409. * @param pData The destination Buffer address.
  410. * @param Length The length of data to be transferred from TIM peripheral to memory.
  411. * @retval HAL status
  412. */
  413. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  414. {
  415. uint32_t tmpsmcr;
  416. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  417. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  418. /* Check the parameters */
  419. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  420. /* Set the TIM channel state */
  421. if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
  422. || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
  423. {
  424. return HAL_BUSY;
  425. }
  426. else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
  427. && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
  428. {
  429. if ((pData == NULL) && (Length > 0U))
  430. {
  431. return HAL_ERROR;
  432. }
  433. else
  434. {
  435. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  436. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  437. }
  438. }
  439. else
  440. {
  441. return HAL_ERROR;
  442. }
  443. /* Enable the Input Capture channel 1
  444. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  445. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  446. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  447. /* Set the DMA Input Capture 1 Callbacks */
  448. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  449. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  450. /* Set the DMA error callback */
  451. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  452. /* Enable the DMA channel for Capture 1*/
  453. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  454. {
  455. /* Return error status */
  456. return HAL_ERROR;
  457. }
  458. /* Enable the capture compare 1 Interrupt */
  459. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  460. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  461. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  462. {
  463. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  464. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  465. {
  466. __HAL_TIM_ENABLE(htim);
  467. }
  468. }
  469. else
  470. {
  471. __HAL_TIM_ENABLE(htim);
  472. }
  473. /* Return function status */
  474. return HAL_OK;
  475. }
  476. /**
  477. * @brief Stops the TIM Hall Sensor Interface in DMA mode.
  478. * @param htim TIM Hall Sensor Interface handle
  479. * @retval HAL status
  480. */
  481. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  482. {
  483. /* Check the parameters */
  484. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  485. /* Disable the Input Capture channel 1
  486. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
  487. TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  488. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  489. /* Disable the capture compare Interrupts 1 event */
  490. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  491. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  492. /* Disable the Peripheral */
  493. __HAL_TIM_DISABLE(htim);
  494. /* Set the TIM channel state */
  495. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  496. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  497. /* Return function status */
  498. return HAL_OK;
  499. }
  500. /**
  501. * @}
  502. */
  503. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  504. * @brief Timer Complementary Output Compare functions
  505. *
  506. @verbatim
  507. ==============================================================================
  508. ##### Timer Complementary Output Compare functions #####
  509. ==============================================================================
  510. [..]
  511. This section provides functions allowing to:
  512. (+) Start the Complementary Output Compare/PWM.
  513. (+) Stop the Complementary Output Compare/PWM.
  514. (+) Start the Complementary Output Compare/PWM and enable interrupts.
  515. (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  516. (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  517. (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  518. @endverbatim
  519. * @{
  520. */
  521. /**
  522. * @brief Starts the TIM Output Compare signal generation on the complementary
  523. * output.
  524. * @param htim TIM Output Compare handle
  525. * @param Channel TIM Channel to be enabled
  526. * This parameter can be one of the following values:
  527. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  528. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  529. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  530. * @retval HAL status
  531. */
  532. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  533. {
  534. uint32_t tmpsmcr;
  535. /* Check the parameters */
  536. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  537. /* Check the TIM complementary channel state */
  538. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  539. {
  540. return HAL_ERROR;
  541. }
  542. /* Set the TIM complementary channel state */
  543. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  544. /* Enable the Capture compare channel N */
  545. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  546. /* Enable the Main Output */
  547. __HAL_TIM_MOE_ENABLE(htim);
  548. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  549. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  550. {
  551. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  552. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  553. {
  554. __HAL_TIM_ENABLE(htim);
  555. }
  556. }
  557. else
  558. {
  559. __HAL_TIM_ENABLE(htim);
  560. }
  561. /* Return function status */
  562. return HAL_OK;
  563. }
  564. /**
  565. * @brief Stops the TIM Output Compare signal generation on the complementary
  566. * output.
  567. * @param htim TIM handle
  568. * @param Channel TIM Channel to be disabled
  569. * This parameter can be one of the following values:
  570. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  571. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  572. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  573. * @retval HAL status
  574. */
  575. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  576. {
  577. /* Check the parameters */
  578. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  579. /* Disable the Capture compare channel N */
  580. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  581. /* Disable the Main Output */
  582. __HAL_TIM_MOE_DISABLE(htim);
  583. /* Disable the Peripheral */
  584. __HAL_TIM_DISABLE(htim);
  585. /* Set the TIM complementary channel state */
  586. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  587. /* Return function status */
  588. return HAL_OK;
  589. }
  590. /**
  591. * @brief Starts the TIM Output Compare signal generation in interrupt mode
  592. * on the complementary output.
  593. * @param htim TIM OC handle
  594. * @param Channel TIM Channel to be enabled
  595. * This parameter can be one of the following values:
  596. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  597. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  598. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  599. * @retval HAL status
  600. */
  601. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  602. {
  603. uint32_t tmpsmcr;
  604. /* Check the parameters */
  605. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  606. /* Check the TIM complementary channel state */
  607. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  608. {
  609. return HAL_ERROR;
  610. }
  611. /* Set the TIM complementary channel state */
  612. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  613. switch (Channel)
  614. {
  615. case TIM_CHANNEL_1:
  616. {
  617. /* Enable the TIM Output Compare interrupt */
  618. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  619. break;
  620. }
  621. case TIM_CHANNEL_2:
  622. {
  623. /* Enable the TIM Output Compare interrupt */
  624. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  625. break;
  626. }
  627. case TIM_CHANNEL_3:
  628. {
  629. /* Enable the TIM Output Compare interrupt */
  630. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  631. break;
  632. }
  633. default:
  634. break;
  635. }
  636. /* Enable the TIM Break interrupt */
  637. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  638. /* Enable the Capture compare channel N */
  639. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  640. /* Enable the Main Output */
  641. __HAL_TIM_MOE_ENABLE(htim);
  642. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  643. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  644. {
  645. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  646. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  647. {
  648. __HAL_TIM_ENABLE(htim);
  649. }
  650. }
  651. else
  652. {
  653. __HAL_TIM_ENABLE(htim);
  654. }
  655. /* Return function status */
  656. return HAL_OK;
  657. }
  658. /**
  659. * @brief Stops the TIM Output Compare signal generation in interrupt mode
  660. * on the complementary output.
  661. * @param htim TIM Output Compare handle
  662. * @param Channel TIM Channel to be disabled
  663. * This parameter can be one of the following values:
  664. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  665. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  666. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  667. * @retval HAL status
  668. */
  669. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  670. {
  671. uint32_t tmpccer;
  672. /* Check the parameters */
  673. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  674. switch (Channel)
  675. {
  676. case TIM_CHANNEL_1:
  677. {
  678. /* Disable the TIM Output Compare interrupt */
  679. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  680. break;
  681. }
  682. case TIM_CHANNEL_2:
  683. {
  684. /* Disable the TIM Output Compare interrupt */
  685. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  686. break;
  687. }
  688. case TIM_CHANNEL_3:
  689. {
  690. /* Disable the TIM Output Compare interrupt */
  691. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  692. break;
  693. }
  694. default:
  695. break;
  696. }
  697. /* Disable the Capture compare channel N */
  698. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  699. /* Disable the TIM Break interrupt (only if no more channel is active) */
  700. tmpccer = htim->Instance->CCER;
  701. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  702. {
  703. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  704. }
  705. /* Disable the Main Output */
  706. __HAL_TIM_MOE_DISABLE(htim);
  707. /* Disable the Peripheral */
  708. __HAL_TIM_DISABLE(htim);
  709. /* Set the TIM complementary channel state */
  710. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  711. /* Return function status */
  712. return HAL_OK;
  713. }
  714. /**
  715. * @brief Starts the TIM Output Compare signal generation in DMA mode
  716. * on the complementary output.
  717. * @param htim TIM Output Compare handle
  718. * @param Channel TIM Channel to be enabled
  719. * This parameter can be one of the following values:
  720. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  721. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  722. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  723. * @param pData The source Buffer address.
  724. * @param Length The length of data to be transferred from memory to TIM peripheral
  725. * @retval HAL status
  726. */
  727. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  728. {
  729. uint32_t tmpsmcr;
  730. /* Check the parameters */
  731. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  732. /* Set the TIM complementary channel state */
  733. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  734. {
  735. return HAL_BUSY;
  736. }
  737. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  738. {
  739. if ((pData == NULL) && (Length > 0U))
  740. {
  741. return HAL_ERROR;
  742. }
  743. else
  744. {
  745. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  746. }
  747. }
  748. else
  749. {
  750. return HAL_ERROR;
  751. }
  752. switch (Channel)
  753. {
  754. case TIM_CHANNEL_1:
  755. {
  756. /* Set the DMA compare callbacks */
  757. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  758. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  759. /* Set the DMA error callback */
  760. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  761. /* Enable the DMA channel */
  762. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  763. Length) != HAL_OK)
  764. {
  765. /* Return error status */
  766. return HAL_ERROR;
  767. }
  768. /* Enable the TIM Output Compare DMA request */
  769. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  770. break;
  771. }
  772. case TIM_CHANNEL_2:
  773. {
  774. /* Set the DMA compare callbacks */
  775. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  776. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  777. /* Set the DMA error callback */
  778. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  779. /* Enable the DMA channel */
  780. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  781. Length) != HAL_OK)
  782. {
  783. /* Return error status */
  784. return HAL_ERROR;
  785. }
  786. /* Enable the TIM Output Compare DMA request */
  787. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  788. break;
  789. }
  790. case TIM_CHANNEL_3:
  791. {
  792. /* Set the DMA compare callbacks */
  793. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  794. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  795. /* Set the DMA error callback */
  796. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  797. /* Enable the DMA channel */
  798. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  799. Length) != HAL_OK)
  800. {
  801. /* Return error status */
  802. return HAL_ERROR;
  803. }
  804. /* Enable the TIM Output Compare DMA request */
  805. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  806. break;
  807. }
  808. default:
  809. break;
  810. }
  811. /* Enable the Capture compare channel N */
  812. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  813. /* Enable the Main Output */
  814. __HAL_TIM_MOE_ENABLE(htim);
  815. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  816. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  817. {
  818. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  819. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  820. {
  821. __HAL_TIM_ENABLE(htim);
  822. }
  823. }
  824. else
  825. {
  826. __HAL_TIM_ENABLE(htim);
  827. }
  828. /* Return function status */
  829. return HAL_OK;
  830. }
  831. /**
  832. * @brief Stops the TIM Output Compare signal generation in DMA mode
  833. * on the complementary output.
  834. * @param htim TIM Output Compare handle
  835. * @param Channel TIM Channel to be disabled
  836. * This parameter can be one of the following values:
  837. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  838. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  839. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  840. * @retval HAL status
  841. */
  842. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  843. {
  844. /* Check the parameters */
  845. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  846. switch (Channel)
  847. {
  848. case TIM_CHANNEL_1:
  849. {
  850. /* Disable the TIM Output Compare DMA request */
  851. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  852. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  853. break;
  854. }
  855. case TIM_CHANNEL_2:
  856. {
  857. /* Disable the TIM Output Compare DMA request */
  858. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  859. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  860. break;
  861. }
  862. case TIM_CHANNEL_3:
  863. {
  864. /* Disable the TIM Output Compare DMA request */
  865. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  866. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  867. break;
  868. }
  869. default:
  870. break;
  871. }
  872. /* Disable the Capture compare channel N */
  873. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  874. /* Disable the Main Output */
  875. __HAL_TIM_MOE_DISABLE(htim);
  876. /* Disable the Peripheral */
  877. __HAL_TIM_DISABLE(htim);
  878. /* Set the TIM complementary channel state */
  879. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  880. /* Return function status */
  881. return HAL_OK;
  882. }
  883. /**
  884. * @}
  885. */
  886. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  887. * @brief Timer Complementary PWM functions
  888. *
  889. @verbatim
  890. ==============================================================================
  891. ##### Timer Complementary PWM functions #####
  892. ==============================================================================
  893. [..]
  894. This section provides functions allowing to:
  895. (+) Start the Complementary PWM.
  896. (+) Stop the Complementary PWM.
  897. (+) Start the Complementary PWM and enable interrupts.
  898. (+) Stop the Complementary PWM and disable interrupts.
  899. (+) Start the Complementary PWM and enable DMA transfers.
  900. (+) Stop the Complementary PWM and disable DMA transfers.
  901. (+) Start the Complementary Input Capture measurement.
  902. (+) Stop the Complementary Input Capture.
  903. (+) Start the Complementary Input Capture and enable interrupts.
  904. (+) Stop the Complementary Input Capture and disable interrupts.
  905. (+) Start the Complementary Input Capture and enable DMA transfers.
  906. (+) Stop the Complementary Input Capture and disable DMA transfers.
  907. (+) Start the Complementary One Pulse generation.
  908. (+) Stop the Complementary One Pulse.
  909. (+) Start the Complementary One Pulse and enable interrupts.
  910. (+) Stop the Complementary One Pulse and disable interrupts.
  911. @endverbatim
  912. * @{
  913. */
  914. /**
  915. * @brief Starts the PWM signal generation on the complementary output.
  916. * @param htim TIM handle
  917. * @param Channel TIM Channel to be enabled
  918. * This parameter can be one of the following values:
  919. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  920. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  921. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  922. * @retval HAL status
  923. */
  924. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  925. {
  926. uint32_t tmpsmcr;
  927. /* Check the parameters */
  928. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  929. /* Check the TIM complementary channel state */
  930. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  931. {
  932. return HAL_ERROR;
  933. }
  934. /* Set the TIM complementary channel state */
  935. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  936. /* Enable the complementary PWM output */
  937. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  938. /* Enable the Main Output */
  939. __HAL_TIM_MOE_ENABLE(htim);
  940. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  941. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  942. {
  943. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  944. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  945. {
  946. __HAL_TIM_ENABLE(htim);
  947. }
  948. }
  949. else
  950. {
  951. __HAL_TIM_ENABLE(htim);
  952. }
  953. /* Return function status */
  954. return HAL_OK;
  955. }
  956. /**
  957. * @brief Stops the PWM signal generation on the complementary output.
  958. * @param htim TIM handle
  959. * @param Channel TIM Channel to be disabled
  960. * This parameter can be one of the following values:
  961. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  962. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  963. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  964. * @retval HAL status
  965. */
  966. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  967. {
  968. /* Check the parameters */
  969. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  970. /* Disable the complementary PWM output */
  971. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  972. /* Disable the Main Output */
  973. __HAL_TIM_MOE_DISABLE(htim);
  974. /* Disable the Peripheral */
  975. __HAL_TIM_DISABLE(htim);
  976. /* Set the TIM complementary channel state */
  977. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  978. /* Return function status */
  979. return HAL_OK;
  980. }
  981. /**
  982. * @brief Starts the PWM signal generation in interrupt mode on the
  983. * complementary output.
  984. * @param htim TIM handle
  985. * @param Channel TIM Channel to be disabled
  986. * This parameter can be one of the following values:
  987. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  988. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  989. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  990. * @retval HAL status
  991. */
  992. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  993. {
  994. uint32_t tmpsmcr;
  995. /* Check the parameters */
  996. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  997. /* Check the TIM complementary channel state */
  998. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
  999. {
  1000. return HAL_ERROR;
  1001. }
  1002. /* Set the TIM complementary channel state */
  1003. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1004. switch (Channel)
  1005. {
  1006. case TIM_CHANNEL_1:
  1007. {
  1008. /* Enable the TIM Capture/Compare 1 interrupt */
  1009. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1010. break;
  1011. }
  1012. case TIM_CHANNEL_2:
  1013. {
  1014. /* Enable the TIM Capture/Compare 2 interrupt */
  1015. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1016. break;
  1017. }
  1018. case TIM_CHANNEL_3:
  1019. {
  1020. /* Enable the TIM Capture/Compare 3 interrupt */
  1021. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  1022. break;
  1023. }
  1024. default:
  1025. break;
  1026. }
  1027. /* Enable the TIM Break interrupt */
  1028. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  1029. /* Enable the complementary PWM output */
  1030. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1031. /* Enable the Main Output */
  1032. __HAL_TIM_MOE_ENABLE(htim);
  1033. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1034. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1035. {
  1036. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1037. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1038. {
  1039. __HAL_TIM_ENABLE(htim);
  1040. }
  1041. }
  1042. else
  1043. {
  1044. __HAL_TIM_ENABLE(htim);
  1045. }
  1046. /* Return function status */
  1047. return HAL_OK;
  1048. }
  1049. /**
  1050. * @brief Stops the PWM signal generation in interrupt mode on the
  1051. * complementary output.
  1052. * @param htim TIM handle
  1053. * @param Channel TIM Channel to be disabled
  1054. * This parameter can be one of the following values:
  1055. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1056. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1057. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1058. * @retval HAL status
  1059. */
  1060. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  1061. {
  1062. uint32_t tmpccer;
  1063. /* Check the parameters */
  1064. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1065. switch (Channel)
  1066. {
  1067. case TIM_CHANNEL_1:
  1068. {
  1069. /* Disable the TIM Capture/Compare 1 interrupt */
  1070. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1071. break;
  1072. }
  1073. case TIM_CHANNEL_2:
  1074. {
  1075. /* Disable the TIM Capture/Compare 2 interrupt */
  1076. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1077. break;
  1078. }
  1079. case TIM_CHANNEL_3:
  1080. {
  1081. /* Disable the TIM Capture/Compare 3 interrupt */
  1082. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  1083. break;
  1084. }
  1085. default:
  1086. break;
  1087. }
  1088. /* Disable the complementary PWM output */
  1089. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1090. /* Disable the TIM Break interrupt (only if no more channel is active) */
  1091. tmpccer = htim->Instance->CCER;
  1092. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  1093. {
  1094. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  1095. }
  1096. /* Disable the Main Output */
  1097. __HAL_TIM_MOE_DISABLE(htim);
  1098. /* Disable the Peripheral */
  1099. __HAL_TIM_DISABLE(htim);
  1100. /* Set the TIM complementary channel state */
  1101. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1102. /* Return function status */
  1103. return HAL_OK;
  1104. }
  1105. /**
  1106. * @brief Starts the TIM PWM signal generation in DMA mode on the
  1107. * complementary output
  1108. * @param htim TIM handle
  1109. * @param Channel TIM Channel to be enabled
  1110. * This parameter can be one of the following values:
  1111. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1112. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1113. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1114. * @param pData The source Buffer address.
  1115. * @param Length The length of data to be transferred from memory to TIM peripheral
  1116. * @retval HAL status
  1117. */
  1118. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  1119. {
  1120. uint32_t tmpsmcr;
  1121. /* Check the parameters */
  1122. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1123. /* Set the TIM complementary channel state */
  1124. if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY)
  1125. {
  1126. return HAL_BUSY;
  1127. }
  1128. else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
  1129. {
  1130. if ((pData == NULL) && (Length > 0U))
  1131. {
  1132. return HAL_ERROR;
  1133. }
  1134. else
  1135. {
  1136. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
  1137. }
  1138. }
  1139. else
  1140. {
  1141. return HAL_ERROR;
  1142. }
  1143. switch (Channel)
  1144. {
  1145. case TIM_CHANNEL_1:
  1146. {
  1147. /* Set the DMA compare callbacks */
  1148. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1149. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1150. /* Set the DMA error callback */
  1151. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1152. /* Enable the DMA channel */
  1153. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1,
  1154. Length) != HAL_OK)
  1155. {
  1156. /* Return error status */
  1157. return HAL_ERROR;
  1158. }
  1159. /* Enable the TIM Capture/Compare 1 DMA request */
  1160. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  1161. break;
  1162. }
  1163. case TIM_CHANNEL_2:
  1164. {
  1165. /* Set the DMA compare callbacks */
  1166. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1167. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1168. /* Set the DMA error callback */
  1169. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1170. /* Enable the DMA channel */
  1171. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2,
  1172. Length) != HAL_OK)
  1173. {
  1174. /* Return error status */
  1175. return HAL_ERROR;
  1176. }
  1177. /* Enable the TIM Capture/Compare 2 DMA request */
  1178. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  1179. break;
  1180. }
  1181. case TIM_CHANNEL_3:
  1182. {
  1183. /* Set the DMA compare callbacks */
  1184. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
  1185. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1186. /* Set the DMA error callback */
  1187. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
  1188. /* Enable the DMA channel */
  1189. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,
  1190. Length) != HAL_OK)
  1191. {
  1192. /* Return error status */
  1193. return HAL_ERROR;
  1194. }
  1195. /* Enable the TIM Capture/Compare 3 DMA request */
  1196. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1197. break;
  1198. }
  1199. default:
  1200. break;
  1201. }
  1202. /* Enable the complementary PWM output */
  1203. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1204. /* Enable the Main Output */
  1205. __HAL_TIM_MOE_ENABLE(htim);
  1206. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1207. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1208. {
  1209. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1210. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1211. {
  1212. __HAL_TIM_ENABLE(htim);
  1213. }
  1214. }
  1215. else
  1216. {
  1217. __HAL_TIM_ENABLE(htim);
  1218. }
  1219. /* Return function status */
  1220. return HAL_OK;
  1221. }
  1222. /**
  1223. * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
  1224. * output
  1225. * @param htim TIM handle
  1226. * @param Channel TIM Channel to be disabled
  1227. * This parameter can be one of the following values:
  1228. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1229. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1230. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1231. * @retval HAL status
  1232. */
  1233. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1234. {
  1235. /* Check the parameters */
  1236. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1237. switch (Channel)
  1238. {
  1239. case TIM_CHANNEL_1:
  1240. {
  1241. /* Disable the TIM Capture/Compare 1 DMA request */
  1242. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1243. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1244. break;
  1245. }
  1246. case TIM_CHANNEL_2:
  1247. {
  1248. /* Disable the TIM Capture/Compare 2 DMA request */
  1249. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1250. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1251. break;
  1252. }
  1253. case TIM_CHANNEL_3:
  1254. {
  1255. /* Disable the TIM Capture/Compare 3 DMA request */
  1256. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1257. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1258. break;
  1259. }
  1260. default:
  1261. break;
  1262. }
  1263. /* Disable the complementary PWM output */
  1264. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1265. /* Disable the Main Output */
  1266. __HAL_TIM_MOE_DISABLE(htim);
  1267. /* Disable the Peripheral */
  1268. __HAL_TIM_DISABLE(htim);
  1269. /* Set the TIM complementary channel state */
  1270. TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
  1271. /* Return function status */
  1272. return HAL_OK;
  1273. }
  1274. /**
  1275. * @}
  1276. */
  1277. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1278. * @brief Timer Complementary One Pulse functions
  1279. *
  1280. @verbatim
  1281. ==============================================================================
  1282. ##### Timer Complementary One Pulse functions #####
  1283. ==============================================================================
  1284. [..]
  1285. This section provides functions allowing to:
  1286. (+) Start the Complementary One Pulse generation.
  1287. (+) Stop the Complementary One Pulse.
  1288. (+) Start the Complementary One Pulse and enable interrupts.
  1289. (+) Stop the Complementary One Pulse and disable interrupts.
  1290. @endverbatim
  1291. * @{
  1292. */
  1293. /**
  1294. * @brief Starts the TIM One Pulse signal generation on the complementary
  1295. * output.
  1296. * @note OutputChannel must match the pulse output channel chosen when calling
  1297. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1298. * @param htim TIM One Pulse handle
  1299. * @param OutputChannel pulse output channel to enable
  1300. * This parameter can be one of the following values:
  1301. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1302. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1303. * @retval HAL status
  1304. */
  1305. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1306. {
  1307. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1308. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1309. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1310. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1311. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1312. /* Check the parameters */
  1313. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1314. /* Check the TIM channels state */
  1315. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1316. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1317. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1318. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1319. {
  1320. return HAL_ERROR;
  1321. }
  1322. /* Set the TIM channels state */
  1323. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1324. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1325. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1326. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1327. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1328. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1329. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1330. /* Enable the Main Output */
  1331. __HAL_TIM_MOE_ENABLE(htim);
  1332. /* Return function status */
  1333. return HAL_OK;
  1334. }
  1335. /**
  1336. * @brief Stops the TIM One Pulse signal generation on the complementary
  1337. * output.
  1338. * @note OutputChannel must match the pulse output channel chosen when calling
  1339. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1340. * @param htim TIM One Pulse handle
  1341. * @param OutputChannel pulse output channel to disable
  1342. * This parameter can be one of the following values:
  1343. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1344. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1345. * @retval HAL status
  1346. */
  1347. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1348. {
  1349. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1350. /* Check the parameters */
  1351. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1352. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1353. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1354. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1355. /* Disable the Main Output */
  1356. __HAL_TIM_MOE_DISABLE(htim);
  1357. /* Disable the Peripheral */
  1358. __HAL_TIM_DISABLE(htim);
  1359. /* Set the TIM channels state */
  1360. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1361. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1362. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1363. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1364. /* Return function status */
  1365. return HAL_OK;
  1366. }
  1367. /**
  1368. * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
  1369. * complementary channel.
  1370. * @note OutputChannel must match the pulse output channel chosen when calling
  1371. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1372. * @param htim TIM One Pulse handle
  1373. * @param OutputChannel pulse output channel to enable
  1374. * This parameter can be one of the following values:
  1375. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1376. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1377. * @retval HAL status
  1378. */
  1379. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1380. {
  1381. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1382. HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1);
  1383. HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2);
  1384. HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
  1385. HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
  1386. /* Check the parameters */
  1387. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1388. /* Check the TIM channels state */
  1389. if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1390. || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
  1391. || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
  1392. || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
  1393. {
  1394. return HAL_ERROR;
  1395. }
  1396. /* Set the TIM channels state */
  1397. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1398. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1399. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
  1400. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
  1401. /* Enable the TIM Capture/Compare 1 interrupt */
  1402. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1403. /* Enable the TIM Capture/Compare 2 interrupt */
  1404. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1405. /* Enable the complementary One Pulse output channel and the Input Capture channel */
  1406. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1407. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
  1408. /* Enable the Main Output */
  1409. __HAL_TIM_MOE_ENABLE(htim);
  1410. /* Return function status */
  1411. return HAL_OK;
  1412. }
  1413. /**
  1414. * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
  1415. * complementary channel.
  1416. * @note OutputChannel must match the pulse output channel chosen when calling
  1417. * @ref HAL_TIM_OnePulse_ConfigChannel().
  1418. * @param htim TIM One Pulse handle
  1419. * @param OutputChannel pulse output channel to disable
  1420. * This parameter can be one of the following values:
  1421. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1422. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1423. * @retval HAL status
  1424. */
  1425. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1426. {
  1427. uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
  1428. /* Check the parameters */
  1429. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1430. /* Disable the TIM Capture/Compare 1 interrupt */
  1431. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1432. /* Disable the TIM Capture/Compare 2 interrupt */
  1433. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1434. /* Disable the complementary One Pulse output channel and the Input Capture channel */
  1435. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1436. TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
  1437. /* Disable the Main Output */
  1438. __HAL_TIM_MOE_DISABLE(htim);
  1439. /* Disable the Peripheral */
  1440. __HAL_TIM_DISABLE(htim);
  1441. /* Set the TIM channels state */
  1442. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1443. TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1444. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1445. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1446. /* Return function status */
  1447. return HAL_OK;
  1448. }
  1449. /**
  1450. * @}
  1451. */
  1452. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1453. * @brief Peripheral Control functions
  1454. *
  1455. @verbatim
  1456. ==============================================================================
  1457. ##### Peripheral Control functions #####
  1458. ==============================================================================
  1459. [..]
  1460. This section provides functions allowing to:
  1461. (+) Configure the commutation event in case of use of the Hall sensor interface.
  1462. (+) Configure Output channels for OC and PWM mode.
  1463. (+) Configure Complementary channels, break features and dead time.
  1464. (+) Configure Master synchronization.
  1465. (+) Configure timer remapping capabilities.
  1466. @endverbatim
  1467. * @{
  1468. */
  1469. /**
  1470. * @brief Configure the TIM commutation event sequence.
  1471. * @note This function is mandatory to use the commutation event in order to
  1472. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1473. * the typical use of this feature is with the use of another Timer(interface Timer)
  1474. * configured in Hall sensor interface, this interface Timer will generate the
  1475. * commutation at its TRGO output (connected to Timer used in this function) each time
  1476. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1477. * @param htim TIM handle
  1478. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1479. * This parameter can be one of the following values:
  1480. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1481. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1482. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1483. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1484. * @arg TIM_TS_NONE: No trigger is needed
  1485. * @param CommutationSource the Commutation Event source
  1486. * This parameter can be one of the following values:
  1487. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1488. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1489. * @retval HAL status
  1490. */
  1491. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1492. uint32_t CommutationSource)
  1493. {
  1494. /* Check the parameters */
  1495. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1496. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1497. __HAL_LOCK(htim);
  1498. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1499. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1500. {
  1501. /* Select the Input trigger */
  1502. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1503. htim->Instance->SMCR |= InputTrigger;
  1504. }
  1505. /* Select the Capture Compare preload feature */
  1506. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1507. /* Select the Commutation event source */
  1508. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1509. htim->Instance->CR2 |= CommutationSource;
  1510. /* Disable Commutation Interrupt */
  1511. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1512. /* Disable Commutation DMA request */
  1513. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1514. __HAL_UNLOCK(htim);
  1515. return HAL_OK;
  1516. }
  1517. /**
  1518. * @brief Configure the TIM commutation event sequence with interrupt.
  1519. * @note This function is mandatory to use the commutation event in order to
  1520. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1521. * the typical use of this feature is with the use of another Timer(interface Timer)
  1522. * configured in Hall sensor interface, this interface Timer will generate the
  1523. * commutation at its TRGO output (connected to Timer used in this function) each time
  1524. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1525. * @param htim TIM handle
  1526. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1527. * This parameter can be one of the following values:
  1528. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1529. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1530. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1531. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1532. * @arg TIM_TS_NONE: No trigger is needed
  1533. * @param CommutationSource the Commutation Event source
  1534. * This parameter can be one of the following values:
  1535. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1536. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1537. * @retval HAL status
  1538. */
  1539. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1540. uint32_t CommutationSource)
  1541. {
  1542. /* Check the parameters */
  1543. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1544. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1545. __HAL_LOCK(htim);
  1546. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1547. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1548. {
  1549. /* Select the Input trigger */
  1550. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1551. htim->Instance->SMCR |= InputTrigger;
  1552. }
  1553. /* Select the Capture Compare preload feature */
  1554. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1555. /* Select the Commutation event source */
  1556. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1557. htim->Instance->CR2 |= CommutationSource;
  1558. /* Disable Commutation DMA request */
  1559. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1560. /* Enable the Commutation Interrupt */
  1561. __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1562. __HAL_UNLOCK(htim);
  1563. return HAL_OK;
  1564. }
  1565. /**
  1566. * @brief Configure the TIM commutation event sequence with DMA.
  1567. * @note This function is mandatory to use the commutation event in order to
  1568. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1569. * the typical use of this feature is with the use of another Timer(interface Timer)
  1570. * configured in Hall sensor interface, this interface Timer will generate the
  1571. * commutation at its TRGO output (connected to Timer used in this function) each time
  1572. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1573. * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1574. * @param htim TIM handle
  1575. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1576. * This parameter can be one of the following values:
  1577. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1578. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1579. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1580. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1581. * @arg TIM_TS_NONE: No trigger is needed
  1582. * @param CommutationSource the Commutation Event source
  1583. * This parameter can be one of the following values:
  1584. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1585. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1586. * @retval HAL status
  1587. */
  1588. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1589. uint32_t CommutationSource)
  1590. {
  1591. /* Check the parameters */
  1592. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1593. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1594. __HAL_LOCK(htim);
  1595. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1596. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
  1597. {
  1598. /* Select the Input trigger */
  1599. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1600. htim->Instance->SMCR |= InputTrigger;
  1601. }
  1602. /* Select the Capture Compare preload feature */
  1603. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1604. /* Select the Commutation event source */
  1605. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1606. htim->Instance->CR2 |= CommutationSource;
  1607. /* Enable the Commutation DMA Request */
  1608. /* Set the DMA Commutation Callback */
  1609. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1610. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1611. /* Set the DMA error callback */
  1612. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1613. /* Disable Commutation Interrupt */
  1614. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1615. /* Enable the Commutation DMA Request */
  1616. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1617. __HAL_UNLOCK(htim);
  1618. return HAL_OK;
  1619. }
  1620. /**
  1621. * @brief Configures the TIM in master mode.
  1622. * @param htim TIM handle.
  1623. * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1624. * contains the selected trigger output (TRGO) and the Master/Slave
  1625. * mode.
  1626. * @retval HAL status
  1627. */
  1628. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1629. TIM_MasterConfigTypeDef *sMasterConfig)
  1630. {
  1631. uint32_t tmpcr2;
  1632. uint32_t tmpsmcr;
  1633. /* Check the parameters */
  1634. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1635. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1636. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1637. /* Check input state */
  1638. __HAL_LOCK(htim);
  1639. /* Change the handler state */
  1640. htim->State = HAL_TIM_STATE_BUSY;
  1641. /* Get the TIMx CR2 register value */
  1642. tmpcr2 = htim->Instance->CR2;
  1643. /* Get the TIMx SMCR register value */
  1644. tmpsmcr = htim->Instance->SMCR;
  1645. /* Reset the MMS Bits */
  1646. tmpcr2 &= ~TIM_CR2_MMS;
  1647. /* Select the TRGO source */
  1648. tmpcr2 |= sMasterConfig->MasterOutputTrigger;
  1649. /* Update TIMx CR2 */
  1650. htim->Instance->CR2 = tmpcr2;
  1651. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1652. {
  1653. /* Reset the MSM Bit */
  1654. tmpsmcr &= ~TIM_SMCR_MSM;
  1655. /* Set master mode */
  1656. tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1657. /* Update TIMx SMCR */
  1658. htim->Instance->SMCR = tmpsmcr;
  1659. }
  1660. /* Change the htim state */
  1661. htim->State = HAL_TIM_STATE_READY;
  1662. __HAL_UNLOCK(htim);
  1663. return HAL_OK;
  1664. }
  1665. /**
  1666. * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1667. * and the AOE(automatic output enable).
  1668. * @param htim TIM handle
  1669. * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1670. * contains the BDTR Register configuration information for the TIM peripheral.
  1671. * @note Interrupts can be generated when an active level is detected on the
  1672. * break input, the break 2 input or the system break input. Break
  1673. * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  1674. * @retval HAL status
  1675. */
  1676. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1677. TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  1678. {
  1679. /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  1680. uint32_t tmpbdtr = 0U;
  1681. /* Check the parameters */
  1682. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1683. assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1684. assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1685. assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1686. assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1687. assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1688. assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1689. assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1690. /* Check input state */
  1691. __HAL_LOCK(htim);
  1692. /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1693. the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1694. /* Set the BDTR bits */
  1695. MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1696. MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1697. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1698. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1699. MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1700. MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1701. MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1702. /* Set TIMx_BDTR */
  1703. htim->Instance->BDTR = tmpbdtr;
  1704. __HAL_UNLOCK(htim);
  1705. return HAL_OK;
  1706. }
  1707. /**
  1708. * @brief Configures the TIMx Remapping input capabilities.
  1709. * @param htim TIM handle.
  1710. * @param Remap specifies the TIM remapping source.
  1711. *
  1712. * @retval HAL status
  1713. */
  1714. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1715. {
  1716. /* Prevent unused argument(s) compilation warning */
  1717. UNUSED(htim);
  1718. UNUSED(Remap);
  1719. return HAL_OK;
  1720. }
  1721. /**
  1722. * @}
  1723. */
  1724. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  1725. * @brief Extended Callbacks functions
  1726. *
  1727. @verbatim
  1728. ==============================================================================
  1729. ##### Extended Callbacks functions #####
  1730. ==============================================================================
  1731. [..]
  1732. This section provides Extended TIM callback functions:
  1733. (+) Timer Commutation callback
  1734. (+) Timer Break callback
  1735. @endverbatim
  1736. * @{
  1737. */
  1738. /**
  1739. * @brief Hall commutation changed callback in non-blocking mode
  1740. * @param htim TIM handle
  1741. * @retval None
  1742. */
  1743. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  1744. {
  1745. /* Prevent unused argument(s) compilation warning */
  1746. UNUSED(htim);
  1747. /* NOTE : This function should not be modified, when the callback is needed,
  1748. the HAL_TIMEx_CommutCallback could be implemented in the user file
  1749. */
  1750. }
  1751. /**
  1752. * @brief Hall commutation changed half complete callback in non-blocking mode
  1753. * @param htim TIM handle
  1754. * @retval None
  1755. */
  1756. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  1757. {
  1758. /* Prevent unused argument(s) compilation warning */
  1759. UNUSED(htim);
  1760. /* NOTE : This function should not be modified, when the callback is needed,
  1761. the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  1762. */
  1763. }
  1764. /**
  1765. * @brief Hall Break detection callback in non-blocking mode
  1766. * @param htim TIM handle
  1767. * @retval None
  1768. */
  1769. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  1770. {
  1771. /* Prevent unused argument(s) compilation warning */
  1772. UNUSED(htim);
  1773. /* NOTE : This function should not be modified, when the callback is needed,
  1774. the HAL_TIMEx_BreakCallback could be implemented in the user file
  1775. */
  1776. }
  1777. /**
  1778. * @}
  1779. */
  1780. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  1781. * @brief Extended Peripheral State functions
  1782. *
  1783. @verbatim
  1784. ==============================================================================
  1785. ##### Extended Peripheral State functions #####
  1786. ==============================================================================
  1787. [..]
  1788. This subsection permits to get in run-time the status of the peripheral
  1789. and the data flow.
  1790. @endverbatim
  1791. * @{
  1792. */
  1793. /**
  1794. * @brief Return the TIM Hall Sensor interface handle state.
  1795. * @param htim TIM Hall Sensor handle
  1796. * @retval HAL state
  1797. */
  1798. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  1799. {
  1800. return htim->State;
  1801. }
  1802. /**
  1803. * @brief Return actual state of the TIM complementary channel.
  1804. * @param htim TIM handle
  1805. * @param ChannelN TIM Complementary channel
  1806. * This parameter can be one of the following values:
  1807. * @arg TIM_CHANNEL_1: TIM Channel 1
  1808. * @arg TIM_CHANNEL_2: TIM Channel 2
  1809. * @arg TIM_CHANNEL_3: TIM Channel 3
  1810. * @retval TIM Complementary channel state
  1811. */
  1812. HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
  1813. {
  1814. HAL_TIM_ChannelStateTypeDef channel_state;
  1815. /* Check the parameters */
  1816. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
  1817. channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
  1818. return channel_state;
  1819. }
  1820. /**
  1821. * @}
  1822. */
  1823. /**
  1824. * @}
  1825. */
  1826. /* Private functions ---------------------------------------------------------*/
  1827. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
  1828. * @{
  1829. */
  1830. /**
  1831. * @brief TIM DMA Commutation callback.
  1832. * @param hdma pointer to DMA handle.
  1833. * @retval None
  1834. */
  1835. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  1836. {
  1837. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1838. /* Change the htim state */
  1839. htim->State = HAL_TIM_STATE_READY;
  1840. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1841. htim->CommutationCallback(htim);
  1842. #else
  1843. HAL_TIMEx_CommutCallback(htim);
  1844. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1845. }
  1846. /**
  1847. * @brief TIM DMA Commutation half complete callback.
  1848. * @param hdma pointer to DMA handle.
  1849. * @retval None
  1850. */
  1851. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  1852. {
  1853. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1854. /* Change the htim state */
  1855. htim->State = HAL_TIM_STATE_READY;
  1856. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1857. htim->CommutationHalfCpltCallback(htim);
  1858. #else
  1859. HAL_TIMEx_CommutHalfCpltCallback(htim);
  1860. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1861. }
  1862. /**
  1863. * @brief TIM DMA Delay Pulse complete callback (complementary channel).
  1864. * @param hdma pointer to DMA handle.
  1865. * @retval None
  1866. */
  1867. static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
  1868. {
  1869. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1870. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1871. {
  1872. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1873. if (hdma->Init.Mode == DMA_NORMAL)
  1874. {
  1875. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1876. }
  1877. }
  1878. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1879. {
  1880. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1881. if (hdma->Init.Mode == DMA_NORMAL)
  1882. {
  1883. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1884. }
  1885. }
  1886. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1887. {
  1888. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1889. if (hdma->Init.Mode == DMA_NORMAL)
  1890. {
  1891. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1892. }
  1893. }
  1894. else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
  1895. {
  1896. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
  1897. if (hdma->Init.Mode == DMA_NORMAL)
  1898. {
  1899. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY);
  1900. }
  1901. }
  1902. else
  1903. {
  1904. /* nothing to do */
  1905. }
  1906. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1907. htim->PWM_PulseFinishedCallback(htim);
  1908. #else
  1909. HAL_TIM_PWM_PulseFinishedCallback(htim);
  1910. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1911. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1912. }
  1913. /**
  1914. * @brief TIM DMA error callback (complementary channel)
  1915. * @param hdma pointer to DMA handle.
  1916. * @retval None
  1917. */
  1918. static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
  1919. {
  1920. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1921. if (hdma == htim->hdma[TIM_DMA_ID_CC1])
  1922. {
  1923. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
  1924. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
  1925. }
  1926. else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
  1927. {
  1928. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
  1929. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
  1930. }
  1931. else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
  1932. {
  1933. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
  1934. TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
  1935. }
  1936. else
  1937. {
  1938. /* nothing to do */
  1939. }
  1940. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1941. htim->ErrorCallback(htim);
  1942. #else
  1943. HAL_TIM_ErrorCallback(htim);
  1944. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1945. htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
  1946. }
  1947. /**
  1948. * @brief Enables or disables the TIM Capture Compare Channel xN.
  1949. * @param TIMx to select the TIM peripheral
  1950. * @param Channel specifies the TIM Channel
  1951. * This parameter can be one of the following values:
  1952. * @arg TIM_CHANNEL_1: TIM Channel 1
  1953. * @arg TIM_CHANNEL_2: TIM Channel 2
  1954. * @arg TIM_CHANNEL_3: TIM Channel 3
  1955. * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
  1956. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  1957. * @retval None
  1958. */
  1959. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  1960. {
  1961. uint32_t tmp;
  1962. tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  1963. /* Reset the CCxNE Bit */
  1964. TIMx->CCER &= ~tmp;
  1965. /* Set or reset the CCxNE Bit */
  1966. TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  1967. }
  1968. /**
  1969. * @}
  1970. */
  1971. #endif /* HAL_TIM_MODULE_ENABLED */
  1972. /**
  1973. * @}
  1974. */
  1975. /**
  1976. * @}
  1977. */
  1978. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/